Here is a list of all struct and union fields with links to the structures/unions they belong to:

- c -

c : IDENT , IRIG_RX_COMP
cache_line_size : PCI_CFG_SPACE
cardbus_cis : PCI_CFG_SPACE
cdev : PCPS_DDEV_s
cfg : CFGH , PCI_ASIC , PCPS_DEV
cfg_badr_0 : PCI_ASIC_CFG
cfg_class_rev_id : PCI_ASIC_CFG
cfg_dev_id : PCI_ASIC_CFG
cfg_limits : ALL_GPIO_INFO
cfg_read_perm : MBG_USER_SETTINGS , MBG_USER_STATUS
cfg_write_perm : MBG_USER_SETTINGS , MBG_USER_STATUS
cfgh : MSG_DATA
channel : TTM
channels : MBG_USER_SETTINGS
chassis_id : MBG_IMS_STATE
chassis_idx : MBG_EVENT_INFO
chk_supp_fnc : OPT_HANDLER_SPEC_S
cic : EPH
cis : EPH
class_code : PCI_CFG_SPACE
clk0_info : SCU_STAT_INFO
clk1_info : SCU_STAT_INFO
clk_jitter : NTP_SYS_STATE
clk_status_1 : SHS_STATUS
clk_status_2 : SHS_STATUS
clk_wander : NTP_SYS_STATE
clnt_info : ALL_NTP_CFG_INFO
clock_accuracy : PTP_CLOCK_QUALITY , PTP_STATE
clock_class : PTP_CLOCK_QUALITY , PTP_STATE
clock_identifier : MBG_PTP_V1_DEFAULT_DATASET
clock_identity : MBG_PTP_V2_DEFAULT_DATASET , PTP_PORT_IDENTITY
clock_offset_scaled_log_variance : PTP_STATE
clock_quality : MBG_PTP_V2_DEFAULT_DATASET
clock_stratum : MBG_PTP_V1_DEFAULT_DATASET
clock_uuid : PTP_V1_UUID
clock_variance : MBG_PTP_V1_DEFAULT_DATASET
clockTimeStampNSec : shmTime
clockTimeStampSec : shmTime
clockTimeStampUSec : shmTime
clr_mask : PCPS_TIME_STATUS_X_MASKS
cmd : MBG_DATABASE_CMD , MBG_FW_UFU_FLASH_CMD , MSG_HDR , PCPS_DDEV_s
cmd_info : OPT_HANDLER_SPEC_S , PCPS_DDEV_s
cmd_name : OPT_HANDLER_SPEC_S
cmdline : MBG_SERVICE_SETTINGS
cn_ratio : GNSS_SV_STATUS
cnt : MBG_MSG_RCV_CTL::rcv_state
code : CTRY , MBG_CODE_NAME_TABLE_ENTRY , MBG_EVT_LOG_ENTRY , SW_REV
codec : MBG_EXT_SYS_INFO_CPU_CODEC
color : MBG_LED_SETTINGS
com : PORT_PARM
comm_col_x : INDENTS
command : PCI_CFG_SPACE
common_if_index : MBG_NET_INTF_LINK_SETTINGS
communication_technology : PTP_V1_UUID
community : MBG_SNMP_V12_SETTINGS
comp_data : CAL_REC_IRIG_RX_COMP
comp_sig_mode : PCPS_TIME_EXT
comp_sig_val : PCPS_TIME_EXT
conn_type : MBG_IO_PORT_INFO , MBG_MSG_CTL_s
connected : PCPS_DDEV_s
contact : MBG_SNMP_GLB_SETTINGS
context_engine_id : MBG_SNMP_V3_SETTINGS
context_name : MBG_SNMP_V3_SETTINGS
control_status : PCI_ASIC
core_mod_rev : MBG_EXT_SYS_INFO
core_mod_type : MBG_EXT_SYS_INFO
corr_dir : CORR_INFO
corr_info : MSG_DATA , PCPS_IO_BUFFER
cos_lat : USER_POS
cos_lon : USER_POS
count : shmTime
counter_cfg : MBG_PTP_STATISTICS_SETTINGS
cp : PCPS_STATUS_STR
cpu_type : NTP_SYS_STATE
crc : EPH
crit_sect : MBG_XHRT_INFO
crs : EPH
csc_limit : MBG_GPIO_BITS_IN_SETTINGS , MBG_GPIO_FREQ_IN_SETTINGS
csc_limit_max : MBG_GPIO_FREQ_IN_SUPP
csum : ALM , ASCII_MSG , CFGH , ELLIPSOID , EPH , FPGA_INFO , FPGA_START_INFO , IONO , USER_POS , UTC
cuc : EPH
cur : MBG_MSG_RCV_CTL::rcv_state
cur_bytes : MBG_TLV_HDR
cur_restrs : NTP_RESTR_LIMITS
curr_prio : XMR_HOLDOVER_STATUS
current_dataset : ALL_PTP_V1_COMMON_DATASETS , ALL_PTP_V2_COMMON_DATASETS
current_minor : PCI_ASIC_VERSION_INFO
current_utc_offset : MBG_PTP_V1_TIME_PROPERTIES_DATASET , MBG_PTP_V2_TIME_PROPERTIES_DATASET
currentLocalOffset : PTP_SMPTE_PROFILE_CFG
cus : EPH
cyc : CYCLES_FILTER_DATA
cyc_after : MBG_SYS_TIME_CYCLES
cyc_before : MBG_SYS_TIME_CYCLES
cycles : PCPS_HR_TIME_CYCLES , PCPS_TIME_CYCLES , PCPS_TIME_STAMP_CYCLES