mbgtools-lx  4.2.8
pcpsdev.h
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1 
2 /**************************************************************************
3  *
4  * $Id: pcpsdev.h 1.58 2018/11/02 14:58:43 martin TRASH $
5  *
6  * Copyright (c) Meinberg Funkuhren, Bad Pyrmont, Germany
7  *
8  * Description:
9  * Definitions used to share information on radio clock devices
10  * between device drivers which have direct access to the hardware
11  * devices and user space programs which evaluate and present that
12  * information.
13  *
14  * At the bottom of the file there are some macros defined which
15  * should be used to access the structures to extract characteristics
16  * of an individual clock.
17  *
18  * -----------------------------------------------------------------------
19  * $Log: pcpsdev.h $
20  * Revision 1.58 2018/11/02 14:58:43 martin
21  * Updated a comment.
22  * Revision 1.57 2018/09/21 15:04:23 martin
23  * Added definitions for TCR180USB.
24  * Added define MBG_DEV_NAME_FMT and macro _tlv_feat_buffp();
25  * Defined a print format for firmware versions.
26  * Renamed macro _must_do_fw_workaround_20ms()
27  * to _pcps_fw_has_20ms_bug().
28  * More unified resource handling.
29  * Renamed a number of symbols.
30  * Updated naming for device feature stuff.
31  * Added doxygen comments.
32  * Revision 1.56 2017/07/04 16:31:08 martin
33  * New types PCPS_CLOCK_NAME and MBG_DEV_NAME.
34  * Definitions used with new feature check implementation.
35  * Changed some macros and definitions to clean up
36  * I/O port usage and storage.
37  * Moved some definitions used with IOCTLs to mbgioctl.h.
38  * Revision 1.55 2017/04/25 11:36:40 martin
39  * Renamed GRC181PEX to GNS181PEX.
40  * Revision 1.54 2017/01/27 09:10:57 martin
41  * Support GPS180AMC.
42  * Support GRC181PEX.
43  * Support GPIO ports.
44  * IRIG TX support for GPS180PEX and TCR180PEX only
45  * if GPS_HAS_IRIG_TX flag is set.
46  * New type PCPS_FW_REV_NUM.
47  * Moved some code to new module mbgsystm.h.
48  * Moved NANO_TIME_64 to gpsdefs.h.
49  * Moved inline function num_bits_set() to cfg_hlp.h.
50  * Added macro _ri_addr().
51  * Added macro _pcps_has_ri_xmr().
52  * Fixed macro syntax.
53  * Doxygen stuff.
54  * Removed trailing spaces.
55  * Cleanup.
56  * Revision 1.53 2013/11/08 08:46:00 martin
57  * Doxygen comment updates.
58  * Revision 1.52 2013/09/26 09:06:47Z martin
59  * Support GLN180PEX and GNSS API.
60  * Added inline fnc num_bits_set().
61  * Revision 1.51 2013/01/25 15:44:21 martin
62  * Added inline function setup_hr_time_cycles_from_timestamp_cycles() which sets
63  * up a PCPS_HR_TIME_CYCLES structure from PCPS_TIME_STAMP_CYCLES.
64  * Revision 1.50 2012/10/02 19:00:46 martin
65  * Support GPS180PEX, TCR180PEX, and PZF180PEX.
66  * Support DCF600USB, TCR600USB, MSF600USB, and WVB600USB.
67  * Runtime support for precise time API introduced with Windows 8.
68  * This does not yet for x64 builds.
69  * There are some g++ versions which fail to compile source code using
70  * the macros provided by Linux to define IOCTL codes. If only the API
71  * functions are called by an application then the IOCTL codes aren't
72  * required anyway, so we just avoid inclusion of mbgioctl.h.
73  * However, some IOCTL related definitions are required anyway, so
74  * they have been moved to this file which is always included.
75  * Bug fix: Use negative sign for delay in KeDelayExecutionThread()
76  * Support on-board event logs.
77  * Moved macro _must_do_fw_workaround_20ms() here.
78  * New macro _pcps_has_debug_status().
79  * Added some macros to test if specific stat_info stuff is supported.
80  * Moved some definitions useful for configuration tools to new file cfg_hlp.h.
81  * Moved IA64 includes from pcpsdev.h to mbgpccyc.h.
82  * Added macros _pcps_has_corr_info() and _pcps_has_tr_distance().
83  * Extended bus flag for USB v2 and macro _pcps_is_usb_v2().
84  * New feature ..._HAS_PZF and macro _pcps_has_pzf().
85  * Moved PC cycles stuff to an new extra header.
86  * Cleaned up handling of pragma pack().
87  * Introduced generic MBG_SYS_TIME with nanosecond resolution.
88  * Support struct timespec under Linux, if available.
89  * Use MBG_TGT_KERNEL instead of _KDD_.
90  * Added PTP unicast master configuration stuff.
91  * For compatibility use cpu_counter() instead of cpu_counter_serializing() under NetBSD.
92  * Optionally support timespec for sys time (USE_TIMESPEC).
93  * Support FreeBSD and NetBSD.
94  * Moved MBG_TGT_SUPP_MEM_ACC definition here.
95  * Moved status port register definitions to pcpsdefs.h.
96  * Features are now defined using enum and bit masks.
97  * Added initializer for feature names (used for debug).
98  * Added macro _pcps_features().
99  * Implemented portable mbg_get_sys_uptime() and mbg_sleep_sec()
100  * functions and associated types.
101  * Revision 1.49 2010/06/30 13:03:48 martin
102  * Use new preprocessor symbol MBG_ARCH_X86.
103  * Use ulong port addresses for all platforms but x86.
104  * Support mbg_get_pc_cycles() for IA64, but mbg_get_pc_cycles_frequency()
105  * is not yet supported.
106  * Don't pack interface structures on Sparc and IA64 architecture.
107  * Revision 1.48 2010/04/26 14:47:42 martin
108  * Define symbol MBG_PC_CYCLES_SUPPORTED if this is the case.
109  * Revision 1.47 2010/01/12 14:03:22 daniel
110  * Added definitions to support reading the raw IRIG data bits.
111  * Revision 1.46 2009/09/29 15:10:35Z martin
112  * Support generic system time, and retrieving time discipline info.
113  * Added _pcps_has_fast_hr_timestamp() macro and associated feature flag.
114  * Revision 1.45 2009/06/19 12:15:18 martin
115  * Added has_irig_time feature and associated macros.
116  * Revision 1.44 2009/06/08 19:30:48 daniel
117  * Account for new features PCPS_HAS_LAN_INTF and
118  * PCPS_HAS_PTP.
119  * Revision 1.43 2009/04/08 08:26:20 daniel
120  * Define firmware version at which the TCR511PCI starts
121  * to support IRIG control bits.
122  * Revision 1.42 2009/03/19 14:58:47Z martin
123  * Tmp. workaround in mbg_delta_pc_cycles() under SPARC which might
124  * generate bus errors due to unaligned access.
125  * Revision 1.41 2009/03/16 16:01:22 martin
126  * Support reading IRIG control function bits.
127  * Revision 1.40 2009/03/13 09:13:39 martin
128  * Support new features .._has_time_scale() and .._has_utc_parm().
129  * Moved some inline functions dealing with MBG_PC_CYCLES
130  * from mbgdevio.h here.
131  * Merged the code from _pcps_get_cycles() and _pcps_get_cycles_frequency()
132  * to the mbg_get_pc_cycles...() inline functions which now replace the
133  * _pcps_get_cycles...() macros.
134  * Fixed cycles code for non-x86 architectures.
135  * Revision 1.39 2008/12/05 16:24:24Z martin
136  * Changed MAX_PARM_STR_TYPE from 10 to 20.
137  * Added support for WWVB signal source.
138  * Support new devices PTP270PEX, FRC511PEX, TCR170PEX, and WWVB51USB.
139  * Added macros _pcps_is_ptp(), _pcps_is_frc(), and _pcps_is_wwvb().
140  * Defined firmware version numbers which fix an IRQ problem with PEX511,
141  * TCR511PEX, and GPS170PEX cards. The fix also requires specific ASIC
142  * versions specified in pci_asic.h.
143  * Defined firmware versions at which PCI511 and PEX511 start
144  * to support HR time.
145  * Support mapped I/O resources.
146  * Changed MBG_PC_CYCLES type for Windows to int64_t.
147  * Renamed MBG_VIRT_ADDR to MBG_MEM_ADDR.
148  * Added MBG_PC_CYCLES_FREQUENCY type.
149  * Added definition of PCPS_TIME_STAMP_CYCLES.
150  * Added PCPS_IRQ_STAT_INFO type and associated flags.
151  * Added macros to convert the endianess of structures.
152  * Added macros _pcps_fw_rev_num_major() and _pcps_fw_rev_num_minor().
153  * Made irq_num signed to use -1 for unassigned IRQ numbers.
154  * Revision 1.38 2008/01/17 10:12:34 daniel
155  * Added support for TCR51USB and MSF51USB.
156  * New type MBG_VIRT_ADDR to specify virtual address values.
157  * New struct PCPS_MAPPED_MEM
158  * Cleanup for PCI ASIC version and features.
159  * Added macros _pcps_is_msf(), _pcps_is_lwr(),
160  * _psps_has_asic_version(), _pcps_has_asic_features().
161  * Revision 1.37 2008/01/17 09:58:11Z daniel
162  * Made comments compatible for doxygen parser.
163  * No sourcecode changes.
164  * Revision 1.36 2007/09/26 09:34:38Z martin
165  * Added support for USB in general and new USB device USB5131.
166  * Added new types PCPS_DEV_ID and PCPS_REF_TYPE.
167  * Removed old PCPS_ERR_... codes. Use MBG_ERR_... codes
168  * from mbgerror.h instead. The old values haven't changed.
169  * Revision 1.35 2007/07/17 08:22:47Z martin
170  * Added support for TCR511PEX and GPS170PEX.
171  * Revision 1.34 2007/07/16 12:50:41Z martin
172  * Added support for PEX511.
173  * Modified/renamed some macros and symbols.
174  * Revision 1.33 2007/03/02 09:40:04Z martin
175  * Changes due to renamed library symbols.
176  * Removed obsolete inclusion of headers.
177  * Preliminary support for *BSD.
178  * Preliminary support for USB.
179  * Revision 1.32 2006/10/23 08:47:55Z martin
180  * Don't use abs() in _pcps_ref_offs_out_of_range() since this might
181  * not work properly for 16 bit integers and value 0x8000.
182  * Revision 1.31 2006/06/14 12:59:13Z martin
183  * Added support for TCR511PCI.
184  * Revision 1.30 2006/04/05 14:58:41 martin
185  * Support higher baud rates for PCI511.
186  * Revision 1.29 2006/04/03 07:29:07Z martin
187  * Added a note about the missing PCPS_ST_IRQF signal
188  * on PCI510 cards.
189  * Revision 1.28 2006/03/10 10:32:56Z martin
190  * Added support for PCI511.
191  * Added support for programmable pulse outputs.
192  * Revision 1.27 2005/11/04 08:48:00Z martin
193  * Added support for GPS170PCI.
194  * Revision 1.26 2005/06/02 08:34:38Z martin
195  * New types MBG_DBG_PORT, MBG_DBG_DATA.
196  * Revision 1.25 2005/05/03 10:04:14 martin
197  * Added macro _pcps_is_pci_amcc().
198  * Revision 1.24 2005/03/29 12:58:19Z martin
199  * Support GENERIC_IO feature.
200  * Revision 1.23 2004/12/09 11:03:37Z martin
201  * Support configuration of on-board frequency synthesizer.
202  * Revision 1.22 2004/11/09 12:57:52Z martin
203  * Redefined interface data types using C99 fixed-size definitions.
204  * Added support for TCR167PCI.
205  * New macro _pcps_has_gps_data().
206  * New type PCPS_STATUS_PORT.
207  * Removed obsolete inclusion of asm/timex.h for Linux.
208  * Revision 1.21 2004/09/06 15:19:49Z martin
209  * Support a GPS_DATA interface where sizes are specified
210  * by 16 instead of the original 8 bit quantities, thus allowing
211  * to transfer data blocks which exceed 255 bytes.
212  * Modified inclusion of header files under Linux.
213  * Modified definition of MBG_PC_CYCLES for Linux.
214  * Revision 1.20 2004/04/14 09:09:11 martin
215  * Source code cleanup.
216  * Revision 1.19 2004/04/07 09:49:14Z martin
217  * Support new feature PCPS_HAS_IRIG_TX.
218  * New macros _pcps_has_irig(), _pcps_has_irig_tx().
219  * Revision 1.18 2004/01/14 11:02:14Z MARTIN
220  * Added formal type MBG_PC_CYCLES for OS/2,
221  * though it's not really required or used.
222  * Revision 1.17 2003/12/22 15:40:16 martin
223  * Support higher baud rates for TCR510PCI and PCI510.
224  * Supports PCPS_HR_TIME for TCR510PCI.
225  * New structures used to read device time together with associated
226  * PC CPU cycles.
227  * For Win32, differentiate between kernel mode and non-kernel mode.
228  * Moved some definitions here from mbgdevio.h.
229  * New type PCPS_ASIC_VERSION.
230  * New macro _pcps_ref_offs_out_of_range().
231  * Revision 1.16 2003/06/19 09:48:30Z MARTIN
232  * Renamed symbols ..clr_cap_buffer to ..clr_ucap_buffer.
233  * New macro _pcps_has_ucap().
234  * New definitions to support cmds PCPS_GIVE_UCAP_ENTRIES
235  * and PCPS_GIVE_UCAP_EVENT.
236  * Revision 1.15 2003/04/15 09:57:25 martin
237  * New typedefs ALL_STR_TYPE_INFO, ALL_PORT_INFO,
238  * RECEIVER_PORT_CFG.
239  * Revision 1.14 2003/04/09 14:07:01Z martin
240  * Supports PCI510, GPS169PCI, and TCR510PCI,
241  * and new PCI_ASIC used by those devices.
242  * Renamed macro _pcps_is_irig() to _pcps_is_irig_rx().
243  * New macros _pcps_has_ref_offs(), _pcps_has_opt_flags().
244  * Fixed macro _pcps_has_hr_time().
245  * New type PCPS_BUS_FLAGS.
246  * Preliminary support for PCPS_TZDL.
247  * Revision 1.13 2002/08/09 07:19:49 MARTIN
248  * Moved definition of ref time sources to pcpsdefs.h.
249  * New feature PCPS_CAN_CLR_CAP_BUFF and
250  * associated macro _pcps_can_clr_cap_buff().
251  * New macros _pcps_is_irig(), _pcps_has_signal(),
252  * _pcps_has_mod().
253  * Revision 1.12 2002/02/19 09:22:53 MARTIN
254  * Added definitions for the maximum number of clocks' serial ports
255  * and string types that can be handled by the configuration programs.
256  * Revision 1.11 2002/02/01 11:36:58 MARTIN
257  * Added new definitions for GPS168PCI.
258  * Inserted definitions of firmware REV_NUMs for supported features
259  * which had previously been defined in pcpsdefs.h.
260  * Include use_pack.h.
261  * Updated comments.
262  * Source code cleanup.
263  * Revision 1.10 2001/11/30 09:52:48 martin
264  * Added support for event_time which, however, requires
265  * a custom GPS firmware.
266  * Revision 1.9 2001/10/16 10:11:14 MARTIN
267  * New Macro _pcps_has_serial_hs() which determines whether
268  * DCF77 clock supports baud rate higher than default.
269  * Re-arranged order of macro definitions.
270  * Revision 1.8 2001/09/03 07:15:05 MARTIN
271  * Added macro to access the firmware revision number.
272  * Cleaned up macro syntax.
273  * Added some comments.
274  * Revision 1.7 2001/08/30 13:20:04 MARTIN
275  * New macro to mark a PCPS_TIME variable as unread.
276  * New macro to check if a PCPS_TIME variable is unread.
277  * Revision 1.6 2001/03/15 15:45:01 MARTIN
278  * Added types PCPS_ERR_FLAGS, PCPS_BUS_NUM, PCPS_SLOT_NUM.
279  * Revision 1.5 2001/03/01 13:53:10 MARTIN
280  * Initial version for the new driver library.
281  *
282  **************************************************************************/
283 
284 #ifndef _PCPSDEV_H
285 #define _PCPSDEV_H
286 
287 #include <mbg_tgt.h>
288 #include <mbgtime.h>
289 #include <mbgsystm.h>
290 #include <mbgpccyc.h>
291 #include <pcpsdefs.h>
292 #include <gpsdefs.h>
293 #include <usbdefs.h>
294 #include <use_pack.h>
295 
296 #if !defined( MBG_TGT_KERNEL )
297  #include <string.h>
298 #endif
299 
300 #if defined( MBG_TGT_LINUX )
301 
302  #if !defined( MBG_TGT_KERNEL )
303  #include <unistd.h>
304  #endif
305 
306 #elif defined( MBG_TGT_FREEBSD )
307 
308  #if defined( MBG_TGT_KERNEL )
309  #include <sys/sysproto.h>
310  #include <sys/pcpu.h>
311  #include <sys/param.h>
312  #include <sys/systm.h>
313  #include <sys/proc.h>
314  #else
315  #include <unistd.h>
316  #include <sys/time.h>
317  #endif
318 
319 #elif defined( MBG_TGT_NETBSD )
320 
321  #if !defined( MBG_TGT_KERNEL )
322  #include <unistd.h>
323  #include <sys/time.h>
324  #endif
325 
326 #elif defined( MBG_TGT_QNX_NTO )
327 
328  #include <unistd.h>
329 
330 #elif defined( MBG_TGT_DOS )
331 
332  #include <dos.h> // for delay()
333 
334 #endif
335 
336 
337 /* Start of header body */
338 
339 #if defined( _USE_PACK )
340  #if !defined( _NO_USE_PACK_INTF )
341  #pragma pack( 1 ) // set byte alignment
342  #define _USING_BYTE_ALIGNMENT
343  #endif
344 #endif
345 
346 
347 #if defined( MBG_TGT_LINUX )
348 
349  #define MBG_TGT_SUPP_MEM_ACC 1
350 
351 #elif defined( MBG_TGT_BSD )
352 
353  #define MBG_TGT_SUPP_MEM_ACC 1
354 
355 #elif defined( MBG_TGT_WIN32 )
356 
357  #define MBG_TGT_SUPP_MEM_ACC 1
358 
359 #elif defined( MBG_TGT_DOS )
360 
361 #endif
362 
363 
364 #if !defined( MBG_TGT_SUPP_MEM_ACC )
365  #define MBG_TGT_SUPP_MEM_ACC 0
366 #endif
367 
368 
371 
372 
373 
386 typedef struct
387 {
391 
393 
394 #define _mbg_swab_mbg_sys_time_cycles( _p ) \
395 do \
396 { \
397  _mbg_swab_mbg_pc_cycles( &(_p)->cyc_before ); \
398  _mbg_swab_mbg_pc_cycles( &(_p)->cyc_after ); \
399  _mbg_swab_mbg_sys_time( &(_p)->sys_time ); \
400 } while ( 0 )
401 
402 
403 
411 // The following flags describe the bus types which are
412 // supported by the plugin clocks.
413 #define PCPS_BUS_ISA 0x0001
414 #define PCPS_BUS_MCA 0x0002
415 #define PCPS_BUS_PCI 0x0004
416 #define PCPS_BUS_USB 0x0008
417 
418 
419 // The flags below are or'ed to the PC_BUS_PCI code
420 // in order to indicate which PCI interface chip is used
421 // on a PCI card. If no flag is set then the S5933 chip is
422 // installed which has been used for the first generation
423 // of Meinberg PCI cards.
424 #define PCPS_BUS_PCI_CHIP_S5920 0x8000
425 #define PCPS_BUS_PCI_CHIP_ASIC 0x4000
426 #define PCPS_BUS_PCI_CHIP_PEX8311 0x2000
427 #define PCPS_BUS_PCI_CHIP_MBGPEX 0x1000
428 
429 // The constants below combine the PCI bus flags:
430 #define PCPS_BUS_PCI_S5933 ( PCPS_BUS_PCI )
431 #define PCPS_BUS_PCI_S5920 ( PCPS_BUS_PCI | PCPS_BUS_PCI_CHIP_S5920 )
432 #define PCPS_BUS_PCI_ASIC ( PCPS_BUS_PCI | PCPS_BUS_PCI_CHIP_ASIC )
433 #define PCPS_BUS_PCI_PEX8311 ( PCPS_BUS_PCI | PCPS_BUS_PCI_CHIP_PEX8311 )
434 #define PCPS_BUS_PCI_MBGPEX ( PCPS_BUS_PCI | PCPS_BUS_PCI_CHIP_MBGPEX )
435 
436 
437 // The flags below are or'ed to the PCPS_BUS_USB code
438 // in order to indicate which USB protocol version
439 // is supported by the device. If no additional flag is set
440 // then the device has a USB v1 interface.
441 #define PCPS_BUS_USB_FLAG_V2 0x8000
442 
443 // The constant below combines the PCI bus flags:
444 #define PCPS_BUS_USB_V2 ( PCPS_BUS_USB | PCPS_BUS_USB_FLAG_V2 )
445 
454 {
493 };
494 
495 
496 #define PCPS_CLOCK_NAME_SZ 10 // including terminating 0
497 
499 
503 
512 typedef struct
513 {
519 
520 } PCPS_DEV_TYPE;
521 
522 
523 
528 
529 
543 typedef struct
544 {
547 
549 
550 
551 
555 #define N_PCPS_PORT_RSRC 2
556 
557 
558 
564 typedef struct
565 {
566  void *user_virtual_address; // TODO
567  #if defined( MBG_TGT_LINUX )
570  #else
571  ulong len;
572  #endif
573 
575 
576 
577 
578 typedef uint32_t PCPS_ERR_FLAGS;
579 typedef uint32_t PCPS_FEATURES;
583 
597 typedef struct
598 {
605  uint32_t timeout_clk;
610 
611 } PCPS_DEV_CFG;
612 
613 
614 
624 #define PCPS_EF_TIMEOUT 0x00000001
625 #define PCPS_EF_INV_FW_ID 0x00000002
626 #define PCPS_EF_IO_INIT 0x00000004
627 #define PCPS_EF_IO_CFG 0x00000008
628 #define PCPS_EF_IO_ENB 0x00000010
629 #define PCPS_EF_IO_RSRC_IO 0x00000020
630 #define PCPS_EF_IO_RSRC_MEM 0x00000040
631 
632 
657 {
666 
669  PCPS_BIT_HAS_EVENT_TIME, // custom GPS firmware only
675 
676  PCPS_BIT_HAS_GPS_DATA_16, // use 16 bit size specifiers
684 
688  PCPS_BIT_HAS_PZF, // can also demodulate DCF77 PZF
690  PCPS_BIT_IS_GNSS, // supports several satellite systems and GNSS API calls
691 
692  N_PCPS_FEATURE_BITS // must not exceed 32 !!
693 };
694 
695 
696 
707 #define PCPS_CAN_SET_TIME ( 1UL << PCPS_BIT_CAN_SET_TIME )
708 #define PCPS_HAS_SERIAL ( 1UL << PCPS_BIT_HAS_SERIAL )
709 #define PCPS_HAS_SYNC_TIME ( 1UL << PCPS_BIT_HAS_SYNC_TIME )
710 #define PCPS_HAS_TZDL ( 1UL << PCPS_BIT_HAS_TZDL )
711 #define PCPS_HAS_IDENT ( 1UL << PCPS_BIT_HAS_IDENT )
712 #define PCPS_HAS_UTC_OFFS ( 1UL << PCPS_BIT_HAS_UTC_OFFS )
713 #define PCPS_HAS_HR_TIME ( 1UL << PCPS_BIT_HAS_HR_TIME )
714 #define PCPS_HAS_SERNUM ( 1UL << PCPS_BIT_HAS_SERNUM )
715 
716 #define PCPS_HAS_TZCODE ( 1UL << PCPS_BIT_HAS_TZCODE )
717 #define PCPS_HAS_CABLE_LEN ( 1UL << PCPS_BIT_HAS_CABLE_LEN )
718 #define PCPS_HAS_EVENT_TIME ( 1UL << PCPS_BIT_HAS_EVENT_TIME )
719 #define PCPS_HAS_RECEIVER_INFO ( 1UL << PCPS_BIT_HAS_RECEIVER_INFO )
720 #define PCPS_CAN_CLR_UCAP_BUFF ( 1UL << PCPS_BIT_CAN_CLR_UCAP_BUFF )
721 #define PCPS_HAS_PCPS_TZDL ( 1UL << PCPS_BIT_HAS_PCPS_TZDL )
722 #define PCPS_HAS_UCAP ( 1UL << PCPS_BIT_HAS_UCAP )
723 #define PCPS_HAS_IRIG_TX ( 1UL << PCPS_BIT_HAS_IRIG_TX )
724 
725 #define PCPS_HAS_GPS_DATA_16 ( 1UL << PCPS_BIT_HAS_GPS_DATA_16 )
726 #define PCPS_HAS_SYNTH ( 1UL << PCPS_BIT_HAS_SYNTH )
727 #define PCPS_HAS_GENERIC_IO ( 1UL << PCPS_BIT_HAS_GENERIC_IO )
728 #define PCPS_HAS_TIME_SCALE ( 1UL << PCPS_BIT_HAS_TIME_SCALE )
729 #define PCPS_HAS_UTC_PARM ( 1UL << PCPS_BIT_HAS_UTC_PARM )
730 #define PCPS_HAS_IRIG_CTRL_BITS ( 1UL << PCPS_BIT_HAS_IRIG_CTRL_BITS )
731 #define PCPS_HAS_LAN_INTF ( 1UL << PCPS_BIT_HAS_LAN_INTF )
732 #define PCPS_HAS_PTP ( 1UL << PCPS_BIT_HAS_PTP )
733 
734 #define PCPS_HAS_IRIG_TIME ( 1UL << PCPS_BIT_HAS_IRIG_TIME )
735 #define PCPS_HAS_FAST_HR_TSTAMP ( 1UL << PCPS_BIT_HAS_FAST_HR_TSTAMP )
736 #define PCPS_HAS_RAW_IRIG_DATA ( 1UL << PCPS_BIT_HAS_RAW_IRIG_DATA )
737 #define PCPS_HAS_PZF ( 1UL << PCPS_BIT_HAS_PZF )
738 #define PCPS_HAS_EVT_LOG ( 1UL << PCPS_BIT_HAS_EVT_LOG )
739 #define PCPS_IS_GNSS ( 1UL << PCPS_BIT_IS_GNSS )
740 
741 
744 #define PCPS_FEATURE_NAMES \
745 { \
746  "PCPS_CAN_SET_TIME", \
747  "PCPS_HAS_SERIAL", \
748  "PCPS_HAS_SYNC_TIME", \
749  "PCPS_HAS_TZDL", \
750  "PCPS_HAS_IDENT", \
751  "PCPS_HAS_UTC_OFFS", \
752  "PCPS_HAS_HR_TIME", \
753  "PCPS_HAS_SERNUM", \
754  "PCPS_HAS_TZCODE", \
755  "PCPS_HAS_CABLE_LEN", \
756  "PCPS_HAS_EVENT_TIME", \
757  "PCPS_HAS_RECEIVER_INFO", \
758  "PCPS_CAN_CLR_UCAP_BUFF", \
759  "PCPS_HAS_PCPS_TZDL", \
760  "PCPS_HAS_UCAP", \
761  "PCPS_HAS_IRIG_TX", \
762  "PCPS_HAS_GPS_DATA_16", \
763  "PCPS_HAS_SYNTH", \
764  "PCPS_HAS_GENERIC_IO", \
765  "PCPS_HAS_TIME_SCALE", \
766  "PCPS_HAS_UTC_PARM", \
767  "PCPS_HAS_IRIG_CTRL_BITS", \
768  "PCPS_HAS_LAN_INTF", \
769  "PCPS_HAS_PTP", \
770  "PCPS_HAS_IRIG_TIME", \
771  "PCPS_HAS_FAST_HR_TSTAMP", \
772  "PCPS_HAS_RAW_IRIG_DATA", \
773  "PCPS_HAS_PZF", \
774  "PCPS_HAS_EVT_LOG", \
775  "PCPS_IS_GNSS" \
776 }
777 
782 // The constants below define those features which are available
783 // in ALL firmware versions which have been shipped with a
784 // specific clock.
785 
786 #define PCPS_FEAT_PC31PS31 0
787 
788 // Some of the features are available in all newer clocks,
789 // so these have been put together in one definition:
790 #define PCPS_FEAT_LVL2 ( PCPS_CAN_SET_TIME \
791  | PCPS_HAS_SERIAL \
792  | PCPS_HAS_SYNC_TIME \
793  | PCPS_HAS_UTC_OFFS )
794 
795 #define PCPS_FEAT_PC32 ( PCPS_FEAT_LVL2 )
796 
797 #define PCPS_FEAT_PCI32 ( PCPS_FEAT_LVL2 )
798 
799 #define PCPS_FEAT_PCI509 ( PCPS_FEAT_LVL2 \
800  | PCPS_HAS_SERNUM \
801  | PCPS_HAS_TZCODE )
802 
803 #define PCPS_FEAT_PCI510 ( PCPS_FEAT_PCI509 )
804 
805 #define PCPS_FEAT_PCI511 ( PCPS_FEAT_PCI510 )
806 
807 #define PCPS_FEAT_GPS167PC ( PCPS_FEAT_LVL2 \
808  | PCPS_HAS_TZDL \
809  | PCPS_HAS_IDENT )
810 
811 #define PCPS_FEAT_GPS167PCI ( PCPS_FEAT_LVL2 \
812  | PCPS_HAS_TZDL \
813  | PCPS_HAS_IDENT \
814  | PCPS_HAS_HR_TIME )
815 
816 #define PCPS_FEAT_GPS168PCI ( PCPS_FEAT_LVL2 \
817  | PCPS_HAS_TZDL \
818  | PCPS_HAS_IDENT \
819  | PCPS_HAS_HR_TIME \
820  | PCPS_HAS_CABLE_LEN \
821  | PCPS_HAS_RECEIVER_INFO )
822 
823 #define PCPS_FEAT_GPS169PCI ( PCPS_FEAT_GPS168PCI \
824  | PCPS_CAN_CLR_UCAP_BUFF \
825  | PCPS_HAS_UCAP )
826 
827 #define PCPS_FEAT_GPS170PCI ( PCPS_FEAT_GPS169PCI \
828  | PCPS_HAS_IRIG_TX \
829  | PCPS_HAS_GPS_DATA_16 \
830  | PCPS_HAS_GENERIC_IO )
831 
832 #define PCPS_FEAT_TCR510PCI ( PCPS_FEAT_LVL2 \
833  | PCPS_HAS_SERNUM )
834 
835 #define PCPS_FEAT_TCR167PCI ( PCPS_FEAT_LVL2 \
836  | PCPS_HAS_SERNUM \
837  | PCPS_HAS_TZDL \
838  | PCPS_HAS_HR_TIME \
839  | PCPS_HAS_RECEIVER_INFO \
840  | PCPS_CAN_CLR_UCAP_BUFF \
841  | PCPS_HAS_UCAP \
842  | PCPS_HAS_IRIG_TX \
843  | PCPS_HAS_GPS_DATA_16 \
844  | PCPS_HAS_GENERIC_IO )
845 
846 #define PCPS_FEAT_TCR511PCI ( PCPS_FEAT_TCR510PCI \
847  | PCPS_HAS_HR_TIME )
848 
849 #define PCPS_FEAT_PEX511 ( PCPS_FEAT_PCI511 )
850 
851 #define PCPS_FEAT_TCR511PEX ( PCPS_FEAT_TCR511PCI )
852 
853 #define PCPS_FEAT_GPS170PEX ( PCPS_FEAT_GPS170PCI )
854 
855 #define PCPS_FEAT_USB5131 ( PCPS_HAS_UTC_OFFS \
856  | PCPS_HAS_SERNUM \
857  | PCPS_HAS_SYNC_TIME \
858  | PCPS_HAS_HR_TIME \
859  | PCPS_CAN_SET_TIME \
860  | PCPS_HAS_TZCODE )
861 
862 #define PCPS_FEAT_TCR51USB ( PCPS_HAS_UTC_OFFS \
863  | PCPS_HAS_SERNUM \
864  | PCPS_HAS_SYNC_TIME \
865  | PCPS_HAS_HR_TIME \
866  | PCPS_CAN_SET_TIME )
867 
868 #define PCPS_FEAT_MSF51USB ( PCPS_HAS_UTC_OFFS \
869  | PCPS_HAS_SERNUM \
870  | PCPS_HAS_SYNC_TIME \
871  | PCPS_HAS_HR_TIME \
872  | PCPS_CAN_SET_TIME )
873 
874 #define PCPS_FEAT_PTP270PEX ( PCPS_HAS_SERNUM \
875  | PCPS_HAS_SYNC_TIME \
876  | PCPS_HAS_HR_TIME \
877  | PCPS_HAS_RECEIVER_INFO \
878  | PCPS_CAN_SET_TIME \
879  | PCPS_CAN_CLR_UCAP_BUFF \
880  | PCPS_HAS_UCAP \
881  | PCPS_HAS_GPS_DATA_16 )
882 
883 #define PCPS_FEAT_FRC511PEX ( PCPS_HAS_SERNUM \
884  | PCPS_HAS_HR_TIME \
885  | PCPS_HAS_RECEIVER_INFO \
886  | PCPS_CAN_SET_TIME \
887  | PCPS_CAN_CLR_UCAP_BUFF \
888  | PCPS_HAS_UCAP \
889  | PCPS_HAS_GPS_DATA_16 )
890 
891 #define PCPS_FEAT_TCR170PEX ( PCPS_FEAT_TCR167PCI )
892 
893 #define PCPS_FEAT_WWVB51USB ( PCPS_FEAT_MSF51USB )
894 
895 #define PCPS_FEAT_GPS180PEX ( ( PCPS_FEAT_GPS170PEX | PCPS_HAS_FAST_HR_TSTAMP ) \
896  & ~PCPS_HAS_IRIG_TX )
897 
899 #define PCPS_FEAT_TCR180PEX ( ( PCPS_FEAT_TCR170PEX | PCPS_HAS_FAST_HR_TSTAMP ) \
900  & ~PCPS_HAS_IRIG_TX )
901 
903 #define PCPS_FEAT_DCF600USB ( PCPS_FEAT_USB5131 )
904 
905 #define PCPS_FEAT_PZF180PEX ( PCPS_FEAT_LVL2 \
906  | PCPS_HAS_TZDL \
907  | PCPS_HAS_HR_TIME \
908  | PCPS_HAS_SERNUM \
909  | PCPS_HAS_RECEIVER_INFO \
910  | PCPS_CAN_CLR_UCAP_BUFF \
911  | PCPS_HAS_UCAP \
912  | PCPS_HAS_GPS_DATA_16 \
913  | PCPS_HAS_GENERIC_IO \
914  | PCPS_HAS_UTC_PARM \
915  | PCPS_HAS_PZF )
916 
917 #define PCPS_FEAT_TCR600USB ( PCPS_FEAT_TCR51USB \
918  | PCPS_HAS_IRIG_CTRL_BITS \
919  | PCPS_HAS_IRIG_TIME \
920  | PCPS_HAS_RAW_IRIG_DATA )
921 
922 #define PCPS_FEAT_MSF600USB ( PCPS_FEAT_MSF51USB )
923 
924 #define PCPS_FEAT_WVB600USB ( PCPS_FEAT_WWVB51USB )
925 
926 #define PCPS_FEAT_GLN180PEX ( PCPS_FEAT_GPS180PEX | PCPS_IS_GNSS )
927 
928 #define PCPS_FEAT_GPS180AMC ( PCPS_FEAT_GPS180PEX )
929 
930 #define PCPS_FEAT_GNS181PEX ( PCPS_FEAT_GLN180PEX )
931 
932 #define PCPS_FEAT_TCR180USB ( PCPS_FEAT_TCR600USB \
933  | PCPS_HAS_TZDL \
934  | PCPS_HAS_RECEIVER_INFO \
935  | PCPS_HAS_GPS_DATA_16 \
936  | PCPS_CAN_CLR_UCAP_BUFF /* TODO ? */ \
937  | PCPS_HAS_UCAP /* TODO ? */ \
938  | PCPS_HAS_GENERIC_IO /* TODO ? */ )
939 
941 
942 
943 // Some features of the API used to access Meinberg plug-in devices
944 // have been implemented starting with the special firmware revision
945 // numbers defined below.
946 //
947 // If no number is specified for a feature/clock model then the feature
948 // is either always supported by that clock model, or not at all.
949 
950 
951 // There are some versions of PCI Express cards out there which do not
952 // safely support hardware IRQs. The following firmware versions are required
953 // for safe IRQ operation:
954 #define REV_HAS_IRQ_FIX_MINOR_PEX511 0x0106
955 #define REV_HAS_IRQ_FIX_MINOR_TCR511PEX 0x0105
956 #define REV_HAS_IRQ_FIX_MINOR_GPS170PEX 0x0104
957 // Additionally there are certain revisions of the bus interface logic
958 // required. The associated version codes are defined in pci_asic.h.
959 
960 // The macro below can be used to check whether the required versions are there:
961 #define _pcps_pex_irq_is_safe( _curr_fw_ver, _req_fw_ver, _curr_asic_ver, \
962  _req_asic_ver_major, _req_asic_ver_minor ) \
963  ( ( (_curr_fw_ver) >= (_req_fw_ver) ) && _pcps_asic_version_greater_equal( \
964  (_curr_asic_ver), (_req_asic_ver_major), (_req_asic_ver_minor ) ) \
965  )
966 
967 /* command PCPS_GIVE_RAW_IRIG_DATA: */
968 #define REV_HAS_RAW_IRIG_DATA_TCR511PEX 0x0111
969 #define REV_HAS_RAW_IRIG_DATA_TCR511PCI 0x0111
970 #define REV_HAS_RAW_IRIG_DATA_TCR51USB 0x0106
971 
972 /* command PCPS_GIVE_IRIG_TIME: */
973 #define REV_HAS_IRIG_TIME_TCR511PEX 0x0109
974 #define REV_HAS_IRIG_TIME_TCR511PCI 0x0109
975 #define REV_HAS_IRIG_TIME_TCR51USB 0x0106
976 
977 /* command PCPS_GET_IRIG_CTRL_BITS: */
978 #define REV_HAS_IRIG_CTRL_BITS_TCR511PEX 0x0107
979 #define REV_HAS_IRIG_CTRL_BITS_TCR511PCI 0x0107
980 #define REV_HAS_IRIG_CTRL_BITS_TCR51USB 0x0106
981 
982 /* This board uses the GPS_DATA interface with 16 bit buffer sizes
983  instead of the original 8 bit sizes, thus allowing to transfer
984  data blocks which exceed 255 bytes (PCPS_HAS_GPS_DATA_16) */
985 #define REV_HAS_GPS_DATA_16_GPS169PCI 0x0202
986 
987 /* the clock supports a higher baud rate than N_PCPS_BD_DCF */
988 #define REV_HAS_SERIAL_HS_PCI509 0x0104
989 
990 /* commands PCPS_GIVE_UCAP_ENTRIES, PCPS_GIVE_UCAP_EVENT */
991 #define REV_HAS_UCAP_GPS167PCI 0x0421
992 #define REV_HAS_UCAP_GPS168PCI 0x0104
993 
994 /* command PCPS_CLR_UCAP_BUFF */
995 #define REV_CAN_CLR_UCAP_BUFF_GPS167PCI 0x0419
996 #define REV_CAN_CLR_UCAP_BUFF_GPS168PCI 0x0101
997 
998 /* commands PCPS_READ_GPS_DATA and PCPS_WRITE_GPS_DATA with */
999 /* code PC_GPS_ANT_CABLE_LEN */
1000 #define REV_HAS_CABLE_LEN_GPS167PCI 0x0411
1001 #define REV_HAS_CABLE_LEN_GPS167PC 0x0411
1002 
1003 /* command PCPS_GIVE_HR_TIME, structure PCPS_HR_TIME: */
1004 #define REV_HAS_HR_TIME_GPS167PC 0x0305
1005 #define REV_HAS_HR_TIME_TCR510PCI 0x0200
1006 #define REV_HAS_HR_TIME_PEX511 0x0105 // This also requires a certain ASIC version.
1007 #define REV_HAS_HR_TIME_PCI511 0x0103
1008 
1009 /* field offs_utc in structure PCPS_TIME: */
1010 #define REV_HAS_UTC_OFFS_PC31PS31 0x0300
1011 
1012 /* command PCPS_GIVE_SYNC_TIME: */
1013 #define REV_HAS_SYNC_TIME_PC31PS31 0x0300
1014 
1015 /* command PCPS_GET_SERIAL, PCPS_SET_SERIAL: */
1016 #define REV_HAS_SERIAL_PC31PS31 0x0300
1017 
1018 /* command PCPS_GIVE_TIME_NOCLEAR: */
1019 #define REV_GIVE_TIME_NOCLEAR_PC31PS31 0x0300
1020 
1021 /* status bit PCPS_LS_ANN: */
1022 #define REV_PCPS_LS_ANN_PC31PS31 0x0300
1023 
1024 /* status bit PCPS_IFTM: */
1025 #define REV_PCPS_IFTM_PC31PS31 0x0300
1026 
1027 /* command PCPS_SET_TIME: */
1028 #define REV_CAN_SET_TIME_PC31PS31 0x0240
1029 
1030 /* command PCPS_GIVE_TIME_NOCLEAR: */
1031 // This is supported by all clocks but PC31/PS31 with
1032 // firmware versions before v3.0. If such a card shall
1033 // be used then the firmware should be updated to the
1034 // last recent version.
1035 
1036 
1043 typedef struct
1044 {
1047 
1048 } PCPS_DEV;
1049 
1050 
1051 #if 1 || defined( MBG_TGT_KERNEL ) //### FIXME
1052  #define _USE_DEV_MACROS 1
1053 #else
1054  #define _USE_DEV_MACROS 0
1055 #endif
1056 
1057 
1058 // The macros below simplify access to the data
1059 // stored in PCPS_DEV structure and should be used
1060 // to extract the desired information.
1061 // If the formal parameter is called _d then a pointer
1062 // to device structure PCPS_DEV is expected.
1063 // If the formal parameter is called _c then a pointer
1064 // to configuration structure PCPS_DEV_CFG is expected.
1065 
1066 // Access device type information:
1067 #define _pcps_type_num( _d ) ( (_d)->type.num )
1068 #define _pcps_type_name( _d ) ( (_d)->type.name )
1069 #define _pcps_dev_id( _d ) ( (_d)->type.dev_id )
1070 #define _pcps_ref_type( _d ) ( (_d)->type.ref_type )
1071 #define _pcps_bus_flags( _d ) ( (_d)->type.bus_flags )
1072 
1073 // Query device type features:
1074 #define _pcps_is_gps( _d ) ( _pcps_ref_type( _d ) == PCPS_REF_GPS )
1075 #define _pcps_is_dcf( _d ) ( _pcps_ref_type( _d ) == PCPS_REF_DCF )
1076 #define _pcps_is_msf( _d ) ( _pcps_ref_type( _d ) == PCPS_REF_MSF )
1077 #define _pcps_is_wwvb( _d ) ( _pcps_ref_type( _d ) == PCPS_REF_WWVB )
1078 #define _pcps_is_irig_rx( _d ) ( _pcps_ref_type( _d ) == PCPS_REF_IRIG )
1079 #define _pcps_is_ptp( _d ) ( _pcps_ref_type( _d ) == PCPS_REF_PTP )
1080 #define _pcps_is_frc( _d ) ( _pcps_ref_type( _d ) == PCPS_REF_FRC )
1081 #define _pcps_is_gnss( _d ) _pcps_has_feature( (_d), PCPS_IS_GNSS )
1082 
1083 #define _pcps_is_lwr( _d ) ( _pcps_is_dcf( _d ) || _pcps_is_msf( _d ) || _pcps_is_wwvb( _d ) )
1084 
1085 // Generic bus types:
1086 #define _pcps_is_isa( _d ) ( _pcps_bus_flags( _d ) & PCPS_BUS_ISA )
1087 #define _pcps_is_mca( _d ) ( _pcps_bus_flags( _d ) & PCPS_BUS_MCA )
1088 #define _pcps_is_pci( _d ) ( _pcps_bus_flags( _d ) & PCPS_BUS_PCI )
1089 #define _pcps_is_usb( _d ) ( _pcps_bus_flags( _d ) & PCPS_BUS_USB )
1090 
1091 // Special bus types:
1092 #define _pcps_is_usb_v2( _d ) ( _pcps_bus_flags( _d ) == PCPS_BUS_USB_V2 )
1093 #define _pcps_is_pci_s5933( _d ) ( _pcps_bus_flags( _d ) == PCPS_BUS_PCI_S5933 )
1094 #define _pcps_is_pci_s5920( _d ) ( _pcps_bus_flags( _d ) == PCPS_BUS_PCI_S5920 )
1095 #define _pcps_is_pci_amcc( _d ) ( _pcps_is_pci_s5920( _d ) || _pcps_is_pci_s5933( _d ) )
1096 #define _pcps_is_pci_asic( _d ) ( _pcps_bus_flags( _d ) == PCPS_BUS_PCI_ASIC )
1097 #define _pcps_is_pci_pex8311( _d ) ( _pcps_bus_flags( _d ) == PCPS_BUS_PCI_PEX8311 )
1098 #define _pcps_is_pci_mbgpex( _d ) ( _pcps_bus_flags( _d ) == PCPS_BUS_PCI_MBGPEX )
1099 
1100 
1101 // Access device configuration information:
1102 #define _pcps_bus_num( _d ) ( (_d)->cfg.bus_num )
1103 #define _pcps_slot_num( _d ) ( (_d)->cfg.slot_num )
1104 
1105 #define _pcps_cfg_short_port_rsrc( _c, _n ) ( (_c)->port[_n] )
1106 #define _pcps_short_port_rsrc( _d, _n ) _pcps_cfg_short_port_rsrc( &(_d)->cfg, (_n) )
1107 
1108 #define _pcps_cfg_short_port_base( _c, _n ) ( _pcps_cfg_short_port_rsrc( (_c), (_n) ).base )
1109 #define _pcps_short_port_base( _d, _n ) ( _pcps_short_port_rsrc( (_d), (_n) ).base )
1110 
1111 #define _pcps_cfg_irq_num( _c ) ( (_c)->irq_num )
1112 #define _pcps_irq_num( _d ) _pcps_cfg_irq_num( &(_d)->cfg )
1113 
1114 #define _pcps_cfg_timeout_clk( _c ) ( (_c)->timeout_clk )
1115 #define _pcps_timeout_clk( _d ) _pcps_cfg_timeout_clk( &(_d)->cfg )
1116 
1117 #define _pcps_fw_rev_num( _d ) ( (_d)->cfg.fw_rev_num )
1118 #define _pcps_features( _d ) ( (_d)->cfg.features )
1119 #define _pcps_fw_id( _d ) ( (_d)->cfg.fw_id )
1120 #define _pcps_sernum( _d ) ( (_d)->cfg.sernum )
1121 
1122 
1123 // The macros below handle the device's err_flags.
1124 #define _pcps_err_flags( _d ) ( (_d)->cfg.err_flags )
1125 #define _pcps_chk_err_flags( _d, _msk ) ( _pcps_err_flags( _d ) & (_msk) )
1126 #define _pcps_set_err_flags( _d, _msk ) ( _pcps_err_flags( _d ) |= (_msk) )
1127 #define _pcps_clr_err_flags( _d, _msk ) ( _pcps_err_flags( _d ) &= ~(_msk) )
1128 
1129 
1130 #if _USE_DEV_MACROS
1131 
1133 #define _pcps_has_feature( _d, _f ) ( ( (_d)->cfg.features & (_f) ) != 0 )
1134 
1136 #define _pcps_has_ri_feature( _p_ri, _f ) ( ( (_p_ri)->features & (_f) ) != 0 )
1137 
1138 #define _ri_addr( _p ) &(_p)->xdev_features.receiver_info
1139 #define _xfeat_addr( _p ) &(_p)->xdev_features.xfeature_buffer
1140 #define _tlv_info_addr( _p ) &(_p)->xdev_features.tlv_info
1141 #define _tlv_feat_buffp( _p ) &(_p)->xdev_features.tlv_info.supp_tlv_feat
1142 
1143 
1144 #define _pcps_can_set_time( _d ) _pcps_has_feature( (_d), PCPS_CAN_SET_TIME )
1145 #define _pcps_has_serial( _d ) _pcps_has_feature( (_d), PCPS_HAS_SERIAL )
1146 #define _pcps_has_sync_time( _d ) _pcps_has_feature( (_d), PCPS_HAS_SYNC_TIME )
1147 #define _pcps_has_ident( _d ) _pcps_has_feature( (_d), PCPS_HAS_IDENT )
1148 #define _pcps_has_utc_offs( _d ) _pcps_has_feature( (_d), PCPS_HAS_UTC_OFFS )
1149 #define _pcps_has_hr_time( _d ) _pcps_has_feature( (_d), PCPS_HAS_HR_TIME )
1150 #define _pcps_has_sernum( _d ) _pcps_has_feature( (_d), PCPS_HAS_SERNUM )
1151 #define _pcps_has_cab_len( _d ) _pcps_has_feature( (_d), PCPS_HAS_CABLE_LEN )
1152 #define _pcps_has_tzdl( _d ) _pcps_has_feature( (_d), PCPS_HAS_TZDL )
1153 #define _pcps_has_pcps_tzdl( _d ) _pcps_has_feature( (_d), PCPS_HAS_PCPS_TZDL )
1154 #define _pcps_has_tzcode( _d ) _pcps_has_feature( (_d), PCPS_HAS_TZCODE )
1155 #define _pcps_has_tz( _d ) _pcps_has_feature( (_d), PCPS_HAS_TZDL \
1156  | PCPS_HAS_PCPS_TZDL \
1157  | PCPS_HAS_TZCODE )
1158 // The next one is supported only with a certain GPS firmware version:
1159 #define _pcps_has_event_time( _d ) _pcps_has_feature( (_d), PCPS_HAS_EVENT_TIME )
1160 #define _pcps_has_receiver_info( _d ) _pcps_has_feature( (_d), PCPS_HAS_RECEIVER_INFO )
1161 #define _pcps_can_clr_ucap_buff( _d ) _pcps_has_feature( (_d), PCPS_CAN_CLR_UCAP_BUFF )
1162 #define _pcps_has_ucap( _d ) _pcps_has_feature( (_d), PCPS_HAS_UCAP )
1163 #define _pcps_has_irig_tx( _d ) _pcps_has_feature( (_d), PCPS_HAS_IRIG_TX )
1164 
1165 // The macro below determines whether a DCF77 clock
1166 // supports a higher baud rate than standard
1167 #define _pcps_has_serial_hs( _d ) \
1168  ( ( _pcps_type_num( _d ) == PCPS_TYPE_TCR511PEX ) || \
1169  ( _pcps_type_num( _d ) == PCPS_TYPE_PEX511 ) || \
1170  ( _pcps_type_num( _d ) == PCPS_TYPE_TCR511PCI ) || \
1171  ( _pcps_type_num( _d ) == PCPS_TYPE_TCR510PCI ) || \
1172  ( _pcps_type_num( _d ) == PCPS_TYPE_PCI511 ) || \
1173  ( _pcps_type_num( _d ) == PCPS_TYPE_PCI510 ) || \
1174  ( _pcps_type_num( _d ) == PCPS_TYPE_PCI509 && \
1175  _pcps_fw_rev_num( _d ) >= REV_HAS_SERIAL_HS_PCI509 ) )
1176 
1177 
1178 #define _pcps_has_signal( _d ) \
1179  ( _pcps_is_dcf( _d ) || _pcps_is_msf( _d ) || _pcps_is_wwvb( _d ) || _pcps_is_irig_rx( _d ) )
1180 
1181 #define _pcps_has_mod( _d ) \
1182  ( _pcps_is_dcf( _d ) || _pcps_is_msf( _d ) || _pcps_is_wwvb( _d ) )
1183 
1184 #define _pcps_has_irig( _d ) \
1185  ( _pcps_is_irig_rx( _d ) || _pcps_has_irig_tx( _d ) )
1186 
1187 #define _pcps_has_irig_ctrl_bits( _d ) \
1188  _pcps_has_feature( (_d), PCPS_HAS_IRIG_CTRL_BITS )
1189 
1190 #define _pcps_has_irig_time( _d ) \
1191  _pcps_has_feature( (_d), PCPS_HAS_IRIG_TIME )
1192 
1193 #define _pcps_has_raw_irig_data( _d ) \
1194  _pcps_has_feature( (_d), PCPS_HAS_RAW_IRIG_DATA )
1195 
1196 #define _pcps_has_ref_offs( _d ) \
1197  _pcps_is_irig_rx( _d )
1198 
1199 #define _pcps_ref_offs_out_of_range( _n ) \
1200  ( ( (_n) > MBG_REF_OFFS_MAX ) || ( (_n) < -MBG_REF_OFFS_MAX ) )
1201 
1202 #define _pcps_has_opt_flags( _d ) \
1203  _pcps_is_irig_rx( _d )
1204 
1205 #define _pcps_has_gps_data_16( _d ) _pcps_has_feature( (_d), PCPS_HAS_GPS_DATA_16 )
1206 
1207 #define _pcps_has_gps_data( _d ) \
1208  ( _pcps_is_gps( _d ) || _pcps_has_gps_data_16( _d ) )
1209 
1210 #define _pcps_has_synth( _d ) _pcps_has_feature( (_d), PCPS_HAS_SYNTH )
1211 
1212 #define _pcps_has_generic_io( _d ) _pcps_has_feature( (_d), PCPS_HAS_GENERIC_IO )
1213 
1214 #define _pcps_has_time_scale( _d ) _pcps_has_feature( (_d), PCPS_HAS_TIME_SCALE )
1215 
1216 #define _pcps_has_utc_parm( _d ) _pcps_has_feature( (_d), PCPS_HAS_UTC_PARM )
1217 
1218 #define _pcps_has_asic_version( _d ) ( _pcps_is_pci_asic( _d ) \
1219  || _pcps_is_pci_pex8311( _d ) \
1220  || _pcps_is_pci_mbgpex( _d ) )
1221 
1222 #define _pcps_has_asic_features( _d ) _pcps_has_asic_version( _d )
1223 
1224 #define _pcps_has_fast_hr_timestamp( _d ) _pcps_has_feature( (_d), PCPS_HAS_FAST_HR_TSTAMP )
1225 
1226 #define _pcps_has_lan_intf( _d ) _pcps_has_feature( (_d), PCPS_HAS_LAN_INTF )
1227 
1228 #define _pcps_has_ptp( _d ) _pcps_has_feature( (_d), PCPS_HAS_PTP )
1229 
1230 #define _pcps_has_ri_ptp_unicast( _p_ri ) _pcps_has_ri_feature( (_p_ri), GPS_HAS_PTP_UNICAST )
1231 
1232 #define _pcps_has_pzf( _d ) _pcps_has_feature( (_d), PCPS_HAS_PZF )
1233 
1234 #define _pcps_has_corr_info( _d ) _pcps_has_pzf( _d )
1235 
1236 #define _pcps_has_tr_distance( _d ) _pcps_has_pzf( _d )
1237 
1238 #define _pcps_has_evt_log( _d ) _pcps_has_feature( (_d), PCPS_HAS_EVT_LOG )
1239 
1240 #define _pcps_has_debug_status( _d ) _pcps_is_irig_rx( _d )
1241 
1242 #define _pcps_has_stat_info( _d ) ( _pcps_is_gps( _d ) || _pcps_has_pzf( _d ) )
1243 
1244 #define _pcps_has_stat_info_mode( _d ) _pcps_is_gps( _d )
1245 
1246 #define _pcps_has_stat_info_svs( _d ) _pcps_is_gps( _d )
1247 
1248 #define _pcps_has_ri_gpio( _p_ri ) _pcps_has_ri_feature( (_p_ri), GPS_HAS_GPIO )
1249 
1250 // We only report that XMR is supported if all required features are supported.
1251 #define _pcps_has_ri_xmr( _p_ri ) ( _pcps_has_ri_feature( (_p_ri), GPS_HAS_XMULTI_REF ) && \
1252  _pcps_has_ri_feature( (_p_ri), GPS_HAS_XMRS_MULT_INSTC ) )
1253 //### TODO should also check GPS_MODEL_HAS_XMR_HOLDOVER_INTV, which is a builtin feature flag only
1254 
1255 #endif // _USE_DEV_MACROS
1256 
1257 
1258 // There are some versions of IRIG receiver cards which ignore the TFOM code
1259 // of an incoming IRIG signal even if an IRIG code has been configured which
1260 // supports this. In this case these cards synchronize to the incoming IRIG
1261 // signal even if the TFOM code reports the IRIG generator is not synchronized.
1262 // The intended behaviour is that the IRIG receiver card changes its status
1263 // to "freewheeling" in this case, unless it has been configured to ignore
1264 // the TFOM code of the incoming IRIG signal (see the ::IFLAGS_DISABLE_TFOM flag
1265 // defined in gpsdefs.h).
1266 
1267 // The macro below can be used to check based on the device info if a specific
1268 // card with a specific firmware always ignores the TFOM code:
1269 #define _pcps_incoming_tfom_ignored( _d ) \
1270  ( ( ( _pcps_type_num( _d ) == PCPS_TYPE_TCR167PCI ) && ( _pcps_fw_rev_num( _d ) <= 0x121 ) ) \
1271  || ( ( _pcps_type_num( _d ) == PCPS_TYPE_TCR170PEX ) && ( _pcps_fw_rev_num( _d ) <= 0x103 ) ) )
1272 
1273 
1274 // Some Meinberg PCI Express cards have a PCIe interface chip with an extra
1275 // PCI bridge built into the chip. Unfortunately there are some mainboards out there
1276 // which do not handle PCI resources behind this PCI bridge correctly. The symptom is
1277 // usually that both I/O address ranges of these cards get the same base address
1278 // assigned by the BIOS, and the effect is that in this case a card is not accessible
1279 // properly, since both I/O ranges try to respond to the same I/O addresses.
1280 // As a consequence, data read from the card is usually garbage.
1281 // The only known fix for this is a BIOS update for the mainboard which makes the
1282 // BIOS handle the card's resources properly.
1283 
1284 // The macro below can be used to test if both port base addresses assigned to a card
1285 // are identical, and thus the BIOS is probably faulty::
1286 #define _pcps_pci_cfg_err( _d ) \
1287  ( _pcps_is_pci( _d ) && _pcps_short_port_base( _d, 0 ) && \
1288  ( _pcps_short_port_base( _d, 1 ) == _pcps_short_port_base( _d, 0 ) ) )
1289 
1290 
1291 
1292 // There are some old firmware versions of GPS PCI cards which may occasionally
1293 // return a HR time stamp which is wrong by 20 milliseconds, if the HR time is
1294 // read right after some GPS data. As a workaround for that bug an application
1295 // must wait at least 1.5 ms and then just read the PCPS_TIME structure
1296 // in order to re-initialize the software interface state.
1297 // This has been fixed in more recent versions of the affected firmware.
1298 // This macro can be used to let an application determine whether it has to
1299 // account for this bug with a given card and firmware version.
1300 #define _pcps_fw_has_20ms_bug( _d ) \
1301 ( \
1302  ( _pcps_type_num( _d ) == PCPS_TYPE_GPS168PCI && _pcps_fw_rev_num( _d ) < 0x0102 ) || \
1303  ( _pcps_type_num( _d ) == PCPS_TYPE_GPS167PCI && _pcps_fw_rev_num( _d ) < 0x0420 ) \
1304 )
1305 
1306 
1307 
1312 {
1320 };
1321 
1322 
1323 
1330 typedef struct
1331 {
1335 
1336 } PCPS_DRVR_INFO;
1337 
1338 
1339 
1340 // The macros below can be used to mark a PCPS_TIME variable
1341 // as unread, i.e. its contents have not been read from the clock,
1342 // and to check if such a variable is marked as unread.
1343 #define _pcps_time_set_unread( _t ) do { (_t)->sec = 0xFF; } while ( 0 )
1344 #define _pcps_time_is_read( _t ) ( (uchar) (_t)->sec != 0xFF )
1345 
1346 
1347 
1354 typedef struct
1355 {
1358 
1360 
1361 
1362 
1369 typedef struct
1370 {
1373 
1375 
1376 #define _mbg_swab_pcps_time_stamp_cycles( _p ) \
1377 do \
1378 { \
1379  _mbg_swab_mbg_pc_cycles( &(_p)->cycles ); \
1380  _mbg_swab_pcps_time_stamp( &(_p)->tstamp ); \
1381 } while ( 0 )
1382 
1383 
1384 
1392 typedef struct
1393 {
1396 
1398 
1399 #define _mbg_swab_pcps_hr_time_cycles( _p ) \
1400 do \
1401 { \
1402  _mbg_swab_mbg_pc_cycles( &(_p)->cycles ); \
1403  _mbg_swab_pcps_hr_time( &(_p)->t ); \
1404 } while ( 0 )
1405 
1406 
1407 
1418 typedef struct
1419 {
1422 
1424 
1425 #define _mbg_swab_mbg_time_info_hrt( _p ) \
1426 do \
1427 { \
1428  _mbg_swab_pcps_hr_time_cycles( &(_p)->ref_hr_time_cycles ); \
1429  _mbg_swab_mbg_sys_time_cycles( &(_p)->sys_time_cycles ); \
1430 } while ( 0 )
1431 
1432 
1433 
1445 typedef struct
1446 {
1449 
1451 
1452 #define _mbg_swab_mbg_time_info_tstamp( _p ) \
1453 do \
1454 { \
1455  _mbg_swab_pcps_time_stamp_cycles( &(_p)->ref_tstamp_cycles ); \
1456  _mbg_swab_mbg_sys_time_cycles( &(_p)->sys_time_cycles ); \
1457 } while ( 0 )
1458 
1459 
1460 
1468 typedef uint32_t PCPS_IRQ_STAT_INFO;
1469 
1470 // Flags used with PCPS_IRQ_STAT_INFO:
1471 #define PCPS_IRQ_STAT_ENABLE_CALLED 0x01
1472 #define PCPS_IRQ_STAT_ENABLED 0x02
1473 #define PCPS_IRQ_STAT_UNSAFE 0x04 // IRQs unsafe with this firmeware version / ASIC
1474 
1475 #define PCPS_IRQ_STATE_DANGER ( PCPS_IRQ_STAT_ENABLED | PCPS_IRQ_STAT_UNSAFE )
1476 
1481 #define PCPS_FW_STR_FMT "%X.%02X"
1482 
1483 #define _pcps_fw_rev_num_major( _v ) \
1484  ( (_v) >> 8 )
1485 
1486 #define _pcps_fw_rev_num_minor( _v ) \
1487  ( (_v) & 0xFF )
1488 
1489 
1490 
1491 #if defined( _USING_BYTE_ALIGNMENT )
1492  #pragma pack() // set default alignment
1493  #undef _USING_BYTE_ALIGNMENT
1494 #endif
1495 
1496 
1497 #if !defined( MBG_TGT_KERNEL )
1498 
1499 static __mbg_inline
1501  const PCPS_TIME_STAMP_CYCLES *p_ts_c )
1502 {
1503  memset( p_ht_c, 0, sizeof( *p_ht_c ) );
1504 
1505  p_ht_c->t.tstamp = p_ts_c->tstamp;
1506  p_ht_c->cycles = p_ts_c->cycles;
1507 
1508 } // setup_hr_time_cycles_from_timestamp_cycles
1509 
1510 #endif
1511 
1512 
1513 
1525 
1526 
1527 
1534 #define MBG_DEV_NAME_FMT "%s_%s"
1535 
1536 
1537 /* End of header body */
1538 
1539 #undef _ext
1540 
1541 #endif /* _PCPSDEV_H */
1542 
PCPS_DEV_ID dev_id
see MEINBERG_PCI_DEVICE_IDS and MBG_USB_DEVICE_IDS
Definition: pcpsdev.h:516
uint16_t ver_num
the device driver&#39;s version number
Definition: pcpsdev.h:1332
High resolution device time, system time, and associated cycles counts.
Definition: pcpsdev.h:1418
uint16_t MBG_DBG_PORT
Definition: pcpsdev.h:370
MBG_SYS_TIME_CYCLES sys_time_cycles
system time stamp plus associated cycles
Definition: pcpsdev.h:1421
PCPS_ID_STR id_str
the device driver&#39;s ID string
Definition: pcpsdev.h:1334
PCPS_HR_TIME t
Definition: pcpsdev.h:1395
System time plus associated cycles counter values.
Definition: pcpsdev.h:386
PCPS_ERR_FLAGS err_flags
See PCPS_ERR_FLAG_MASKS.
Definition: pcpsdev.h:599
PCPS_BUS_FLAGS bus_flags
see PCPS_BUS_FLAG_MASKS
Definition: pcpsdev.h:518
feat_num field contains one of the GPS_FEATURE_BITS
Definition: pcpsdev.h:1316
short int16_t
Definition: words.h:212
A structure used to retrieve an address to be mapped into user space.
Definition: pcpsdev.h:564
A timestamp with nanosecond resolution, but 64 bit size.
Definition: words.h:621
PCPS_DEV_TYPE type
Definition: pcpsdev.h:1045
uint16_t PCPS_BUS_NUM
Definition: pcpsdev.h:580
PCPS_FEATURE_BITS
Feature bits for bus-level devices.
Definition: pcpsdev.h:656
unsigned short uint16_t
Definition: words.h:213
MBG_PC_CYCLES cycles
Definition: pcpsdev.h:1394
feat_num field contains one of the PCPS_FEATURE_BITS
Definition: pcpsdev.h:1315
PCPS_SLOT_NUM slot_num
Definition: pcpsdev.h:601
MBG_PC_CYCLES cyc_before
cycles count before sys time is read
Definition: pcpsdev.h:388
feat_num field contains one of the GPS_BUILTIN_FEATURE_BITS
Definition: pcpsdev.h:1313
Time read from a device plus associated system cycles count.
Definition: pcpsdev.h:1354
feat_num field contains one of the MBG_TLV_FEAT_TYPES
Definition: pcpsdev.h:1318
int16_t irq_num
Definition: pcpsdev.h:604
uint32_t PCPS_FEATURES
see PCPS_FEATURE_MASKS
Definition: pcpsdev.h:579
High resolution time stamp plus associated system cycles count.
Definition: pcpsdev.h:1369
MBG_SYS_TIME_CYCLES sys_time_cycles
system timestamp plus associated cycles
Definition: pcpsdev.h:1448
Device information.
Definition: pcpsdev.h:597
PCPS_FEATURES features
See PCPS_FEATURE_MASKS.
Definition: pcpsdev.h:607
PCPS_TIME_STAMP tstamp
High resolution time stamp (UTC)
Definition: pcpsdev.h:1372
PCPS_SN_STR sernum
Definition: pcpsdev.h:609
PCPS_FW_REV_NUM fw_rev_num
Definition: pcpsdev.h:606
PCPS_CLOCK_NAME name
Definition: pcpsdev.h:515
PCPS_REF_TYPE ref_type
see PCPS_REF_TYPES
Definition: pcpsdev.h:517
MBG_PC_CYCLES cycles
Definition: pcpsdev.h:1356
uint16_t n_devs
the number of devices handled by the driver
Definition: pcpsdev.h:1333
void * user_virtual_address
Definition: pcpsdev.h:566
PCPS_DEV_CFG cfg
Definition: pcpsdev.h:1046
High resolution device time stamp, system time, and associated cycles counts.
Definition: pcpsdev.h:1445
uint64_t pfn_offset
Definition: pcpsdev.h:569
PCPS_ID_STR fw_id
Definition: pcpsdev.h:608
uint16_t PCPS_DEV_ID
Definition: pcpsdev.h:500
char PCPS_CLOCK_NAME[10]
Definition: pcpsdev.h:498
uint8_t MBG_DBG_DATA
Definition: pcpsdev.h:369
char PCPS_SN_STR[(16+1)]
A buffer for a serial number string, including terminating 0.
Definition: pcpsdefs.h:925
PCPS_TIME_STAMP tstamp
High resolution time stamp (UTC)
Definition: pcpsdefs.h:1087
MBG_SYS_TIME sys_time
system time stamp
Definition: pcpsdev.h:390
PCPS_TYPES
A list of known devices.
Definition: pcpsdev.h:453
#define N_PCPS_PORT_RSRC
The max. number of I/O port resources used by a clock.
Definition: pcpsdev.h:555
PCPS_TIME_STAMP_CYCLES ref_tstamp_cycles
HR timestamp from the card, plus cycles.
Definition: pcpsdev.h:1447
unsigned char uint8_t
Definition: words.h:210
char MBG_DEV_NAME[10+(16+1)+1]
A string buffer for a unique device ID.
Definition: pcpsdev.h:1524
char PCPS_ID_STR[(2 *16+1)]
A buffer for an ID string, including terminating 0.
Definition: pcpsdefs.h:918
#define PCPS_SN_SIZE
The maximum length of a serial number string, including terminating 0.
Definition: pcpsdefs.h:922
An I/O port resource used by a device.
Definition: pcpsdev.h:543
uint32_t PCPS_IRQ_STAT_INFO
Definition: pcpsdev.h:1468
PCPS_HR_TIME_CYCLES ref_hr_time_cycles
HR time read from the card, plus cycles.
Definition: pcpsdev.h:1420
MBG_PC_CYCLES cyc_after
cycles count after sys time has been read
Definition: pcpsdev.h:389
MBG_PC_CYCLES cycles
Definition: pcpsdev.h:1371
uint16_t num
see PCPS_TYPES
Definition: pcpsdev.h:514
Device type specification.
Definition: pcpsdev.h:512
uint32_t timeout_clk
Definition: pcpsdev.h:605
#define PCPS_CLOCK_NAME_SZ
Definition: pcpsdev.h:496
High resolution time including status and local time offset.
Definition: pcpsdefs.h:1085
High resolution time plus associated system cycles count.
Definition: pcpsdev.h:1392
PCPS_BUS_NUM bus_num
Definition: pcpsdev.h:600
PCPS_TIME t
Definition: pcpsdev.h:1357
uint32_t PCPS_ERR_FLAGS
see PCPS_ERR_FLAG_MASKS
Definition: pcpsdev.h:578
Local calendar date and time, plus sync status.
Definition: pcpsdefs.h:1128
feat_num field contains one of the MBG_XFEATURE_BITS
Definition: pcpsdev.h:1317
A high resolution time stamp.
Definition: pcpsdefs.h:972
uint16_t PCPS_BUS_FLAGS
Definition: pcpsdev.h:502
feat_num field contains one of the PCPS_REF_TYPES
Definition: pcpsdev.h:1314
uint64_t len
Definition: pcpsdev.h:568
Device driver information.
Definition: pcpsdev.h:1330
PCPS_SHORT_PORT_ADDR base
Definition: pcpsdev.h:545
unsigned __int64 uint64_t
Definition: words.h:250
uint16_t PCPS_SHORT_PORT_ADDR
Legacy I/O address type, see PCPS_SHORT_PORT_RSRC.
Definition: pcpsdev.h:527
int64_t MBG_PC_CYCLES
Generic types to hold PC cycle counter values.
Definition: mbgpccyc.h:97
uint16_t PCPS_FW_REV_NUM
firmware revision number, MSB major, LSB minor version
Definition: pcpsdev.h:582
unsigned long ulong
Definition: words.h:292
DEV_FEAT_TYPES
Codes used with IOCTL_DEV_FEAT_REQ::feat_type.
Definition: pcpsdev.h:1311
static __mbg_inline void setup_hr_time_cycles_from_timestamp_cycles(PCPS_HR_TIME_CYCLES *p_ht_c, const PCPS_TIME_STAMP_CYCLES *p_ts_c)
Definition: pcpsdev.h:1500
uint16_t PCPS_REF_TYPE
Definition: pcpsdev.h:501
PCPS_SHORT_PORT_ADDR short_status_port
Definition: pcpsdev.h:603
Device info structure.
Definition: pcpsdev.h:1043
uint16_t PCPS_SLOT_NUM
Definition: pcpsdev.h:581