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1.8.13
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mbgtools-lx
4.2.8
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Go to the source code of this file.
Macros | |
| #define | _ext extern |
| #define | PCI_DEVICE_ID_PLX_8111 0x8111 |
| #define | PLX_PECS_EECTL_WRITE_DATA_SHIFT 0 |
| #define | PLX_PECS_EECTL_READ_DATA_SHIFT 8 |
| #define | PLX_PECS_EECTL_WRITE_START ( 1UL << 16 ) |
| #define | PLX_PECS_EECTL_READ_START ( 1UL << 17 ) |
| #define | PLX_PECS_EECTL_CS_ENB ( 1UL << 18 ) |
| #define | PLX_PECS_EECTL_BUSY ( 1UL << 19 ) |
| #define | PLX_PECS_EECTL_VALID ( 1UL << 20 ) |
| #define | PLX_PECS_EECTL_PRESENT ( 1UL << 21 ) |
| #define | PLX_PECS_EECTL_CS_ACTIVE ( 1UL << 22 ) |
| #define | PLX_PECS_EECTL_RELOAD ( 1UL << 31 ) |
| #define | PLX_PECS_EECLKFREQ_8_3_MHZ 0x02 |
| #define | PLX_PECS_GPIOCTL_GPIO3_DATA ( 1UL << 3 ) |
| #define | PLX_LCS_CNTRL_USERO ( 1UL << 16 ) |
| #define | PLX_LCS_CNTRL_USERI ( 1UL << 17 ) |
| #define | PLX_LCS_INTCSR_INT_ENB |
| #define | PLX_LCS_INTCSR_INT_FLAG ( 1UL << 15 ) /* Local Interrupt Input Active */ |
Enumerations | |
| enum | PLX_PECS_REGS { PLX_PECS_PCICAPPTR = 0x34, PLX_PECS_MAININDEX = 0x84, PLX_PECS_MAINDATA = 0x88, PLX_PECS_EECTL = 0x1004, PLX_PECS_EECLKFREQ = 0x1008, PLX_PECS_GPIOCTL = 0x1020, PLX_PECS_GPIOSTAT = 0x1024, PLX_PECS_TLPCFG0 = 0x1048, N_PLX_PECS_REGS } |
| PLX PCI Express Configuration Space (PECS) registers. More... | |
| enum | PLX_LCS_REGS_PCI { PLX_LCS_INTCSR = 0x68, PLX_LCS_CNTRL = 0x6C, N_PLX_LCS_REGS_PCI } |
| Local Configuration Space (LCS) registers. More... | |
| #define PCI_DEVICE_ID_PLX_8111 0x8111 |
PCI device ID of the PCI bridge also built into the PLX8311
Definition at line 62 of file plxdefs.h.
Referenced by ptp270pex_can_flag_ready().
| #define PLX_LCS_CNTRL_USERI ( 1UL << 17 ) |
Definition at line 148 of file plxdefs.h.
Referenced by ptp270pex_has_flagged_ready().
| #define PLX_LCS_INTCSR_INT_ENB |
Definition at line 154 of file plxdefs.h.
Referenced by pcps_probe_device().
| #define PLX_LCS_INTCSR_INT_FLAG ( 1UL << 15 ) /* Local Interrupt Input Active */ |
Definition at line 159 of file plxdefs.h.
Referenced by pcps_probe_device().
| #define PLX_PECS_GPIOCTL_GPIO3_DATA ( 1UL << 3 ) |
Definition at line 126 of file plxdefs.h.
Referenced by ptp270pex_can_flag_ready().
| enum PLX_LCS_REGS_PCI |
Local Configuration Space (LCS) registers.
These registers are accessed with different addresses from local or PCI, and these addresses are to be used from PCI. See chapter 20 of the PLX8311 manual.
| Enumerator | |
|---|---|
| PLX_LCS_INTCSR | Interrupt control / status. |
| PLX_LCS_CNTRL | 0xEC from local |
| N_PLX_LCS_REGS_PCI | |
| enum PLX_PECS_REGS |
PLX PCI Express Configuration Space (PECS) registers.
These registers are located in the PCI configuration space and can be accessed using standard PCI configuration register access functions.
In addition the PECS registers are mirrored into the 64k memory space addressed via PCI base register 0, and thus can be accessed using memory reads or writes via the PCI bus.
The default values of these registers can be overwritten by the PCI Express interface serial EEPROM.
Care must be taken not to confuse the registers of the PLX8311 with the correspondent registers of the built-in PLX8111. Similarly the serial EEPROM for the PLX8311 must not be confused with the serial EEPROM for the built-in PEX8111 PCI bridge.
Address Offset: 0000h - 0FFFh PCI compatible configuration registers 1000h - 1FFFh Main configuration registers 2000h - 2FFFh Memory mapped indirect access (PLX8311 only, see manual) 8000h - 9FFFh 8k internal shared memory
See chapter 19 of the PLX8311 manual.
1.8.13